Update for FW 5.10 (UART speed), removed some extraneous prints as well

diff --git a/modules/unipi/Makefile b/modules/unipi/Makefile
index 321946c1562b8f93756a3d694c61cdc25d7a2a64..06d62464fb62dae3a79d472b8bd6a86c1b32fdb1 100644 (file)
--- a/modules/unipi/Makefile
+++ b/modules/unipi/Makefile
@@ -3,7 +3,7 @@
 # if necessary.
  
 SYMLINK_DIR_PATH = /run/kernel/neuron_spi
-LINUX_DIR_PATH = /root/bokula/linux
+LINUX_DIR_PATH = /root/linux/4_9_41
 SRC_DIR_PATH = $(PWD)/src
 BIN_DIR_PATH = $(PWD)/bin
 

diff --git a/modules/unipi/src/unipi_platform.c b/modules/unipi/src/unipi_platform.c
index 08a0ec8ab317068c3a3f7918f20147df4fc844e4..64335a40a674115102cf717a1bef0e7d7ae1de71 100644 (file)
--- a/modules/unipi/src/unipi_platform.c
+++ b/modules/unipi/src/unipi_platform.c
@@ -1580,7 +1580,7 @@ int neuronspi_regmap_hw_reg_read(void *context, unsigned int reg, unsigned int *
        u8 *inp_buf;
        u8 *outp_buf;
        int write_length;
-       printk(KERN_INFO "NEURONSPI: RM_REG_READ\n");
+       //printk(KERN_INFO "NEURONSPI: RM_REG_READ\n");
        write_length = neuronspi_spi_compose_single_register_read(reg, &inp_buf, &outp_buf);
        neuronspi_spi_send_message(spi, inp_buf, outp_buf, write_length, n_spi->ideal_frequency, 25, 1);
        memcpy(val, &outp_buf[NEURONSPI_HEADER_LENGTH], sizeof(u16));
@@ -1603,7 +1603,7 @@ int neuronspi_regmap_hw_reg_write(void *context, unsigned int reg, unsigned int
        u8 *outp_buf;
        int write_length;
        write_length = neuronspi_spi_compose_single_register_write(reg, &inp_buf, &outp_buf, (val >> 8));
-       printk(KERN_INFO "HW_REG_WRITE l:%d, r:%d, v:%d\n", write_length, reg, (val >> 8));
+       //printk(KERN_INFO "HW_REG_WRITE l:%d, r:%d, v:%d\n", write_length, reg, (val >> 8));
        neuronspi_spi_send_message(spi, inp_buf, outp_buf, write_length, n_spi->ideal_frequency, 25, 1);
        memcpy(&val, &outp_buf[NEURONSPI_HEADER_LENGTH], sizeof(u16));
        kfree(inp_buf);
@@ -1621,7 +1621,7 @@ int neuronspi_regmap_hw_gather_write(void *context, const void *reg, size_t reg_
        u8 *outp_buf;
        int i, write_length;
        int block_counter = 0;
-       printk(KERN_INFO "HW_REG_GATHER_WRITE:%d, %d, %x, %x\n", val_size, reg_size, mb_reg_buf[0], mb_val_buf[0]);
+       //printk(KERN_INFO "HW_REG_GATHER_WRITE:%d, %d, %x, %x\n", val_size, reg_size, mb_reg_buf[0], mb_val_buf[0]);
        if (reg_size == 1) {
                neuronspi_regmap_hw_reg_write(context,mb_reg_buf[0],mb_val_buf[0]);
        } else {
@@ -1761,7 +1761,6 @@ int neuronspi_regmap_hw_read(void *context, const void *reg_buf, size_t reg_size
                        block_counter++;
                }
        }
-       printk(KERN_INFO "NEURONSPI: RM_READ %d %x %d %x\n", reg_size, mb_reg_buf[0], val_size, mb_val_buf[0]);
        return 0;
 }
 

diff --git a/modules/unipi/src/unipi_platform.h b/modules/unipi/src/unipi_platform.h
index 0496c89bfed913899aada2031f9e1867dd1e1958..4b95a1572159b2f54c111bddd2d1e9aa23da5cba 100644 (file)
--- a/modules/unipi/src/unipi_platform.h
+++ b/modules/unipi/src/unipi_platform.h
@@ -158,7 +158,7 @@ struct neuronspi_model_definition
 
 // Register function codes
 // Digital Input Functions
-#define NEURONSPI_FUNGROUP_DI                                  0
+#define NEURONSPI_FUNGROUP_DI                  0
 #define NEURONSPI_REGFUN_DI_READ                       0 | NEURONSPI_FUNGROUP_DI << 8
 #define NEURONSPI_REGFUN_DI_COUNTER_LOWER      1 | NEURONSPI_FUNGROUP_DI << 8
 #define NEURONSPI_REGFUN_DI_COUNTER_UPPER      2 | NEURONSPI_FUNGROUP_DI << 8
@@ -168,11 +168,11 @@ struct neuronspi_model_definition
 #define NEURONSPI_REGFUN_DS_TOGGLE                     6 | NEURONSPI_FUNGROUP_DI << 8
 
 // Digital Output Functions
-#define NEURONSPI_FUNGROUP_DO                                  1
+#define NEURONSPI_FUNGROUP_DO                  1
 #define NEURONSPI_REGFUN_DO_RW                         0 | NEURONSPI_FUNGROUP_DO << 8
 
 // B1000 Analog Output Functions
-#define NEURONSPI_FUNGROUP_AO_BRAIN                            2
+#define NEURONSPI_FUNGROUP_AO_BRAIN            2
 #define NEURONSPI_REGFUN_AO_BRAIN                      0 | NEURONSPI_FUNGROUP_AO_BRAIN << 8
 #define NEURONSPI_REGFUN_AO_BRAIN_MODE         1 | NEURONSPI_FUNGROUP_AO_BRAIN << 8
 #define NEURONSPI_REGFUN_AO_BRAIN_V_ERR                2 | NEURONSPI_FUNGROUP_AO_BRAIN << 8
@@ -181,7 +181,7 @@ struct neuronspi_model_definition
 #define NEURONSPI_REGFUN_AO_BRAIN_I_OFF        5 | NEURONSPI_FUNGROUP_AO_BRAIN << 8
 
 // B1000 Analog Input Functions
-#define NEURONSPI_FUNGROUP_AI_BRAIN                            3
+#define NEURONSPI_FUNGROUP_AI_BRAIN            3
 #define NEURONSPI_REGFUN_AI_BRAIN                      0 | NEURONSPI_FUNGROUP_AI_BRAIN << 8
 #define NEURONSPI_REGFUN_AIO_BRAIN                     1 | NEURONSPI_FUNGROUP_AI_BRAIN << 8
 #define NEURONSPI_REGFUN_AI_BRAIN_MODE         2 | NEURONSPI_FUNGROUP_AI_BRAIN << 8
@@ -193,7 +193,7 @@ struct neuronspi_model_definition
 #define NEURONSPI_REGFUN_AIO_BRAIN_OFF         8 | NEURONSPI_FUNGROUP_AI_BRAIN << 8
 
 // System Functions
-#define NEURONSPI_FUNGROUP_SYSTEM                              4
+#define NEURONSPI_FUNGROUP_SYSTEM              4
 #define NEURONSPI_REGFUN_V_REF_INT                     0 | NEURONSPI_FUNGROUP_SYSTEM << 8
 #define NEURONSPI_REGFUN_V_REF_INP                     1 | NEURONSPI_FUNGROUP_SYSTEM << 8
 #define NEURONSPI_REGFUN_LED_RW                                2 | NEURONSPI_FUNGROUP_SYSTEM << 8
@@ -208,31 +208,31 @@ struct neuronspi_model_definition
 #define NEURONSPI_REGFUN_NONE_TEST                     11 | NEURONSPI_FUNGROUP_SYSTEM << 8
 
 // Watchdog Functions
-#define NEURONSPI_FUNGROUP_MWD                                 5
+#define NEURONSPI_FUNGROUP_MWD                 5
 #define NEURONSPI_REGFUN_MWD_TO                                0 | NEURONSPI_FUNGROUP_MWD << 8
 #define NEURONSPI_REGFUN_MWD_STATUS                    1 | NEURONSPI_FUNGROUP_MWD << 8
 
 // PWM Functions
-#define NEURONSPI_FUNGROUP_PWM                                 6
+#define NEURONSPI_FUNGROUP_PWM                 6
 #define NEURONSPI_REGFUN_PWM_DUTY                      0 | NEURONSPI_FUNGROUP_PWM << 8
 #define NEURONSPI_REGFUN_PWM_PRESCALE          1 | NEURONSPI_FUNGROUP_PWM << 8
 #define NEURONSPI_REGFUN_PWM_CYCLE                     2 | NEURONSPI_FUNGROUP_PWM << 8
 
 // UART Functions
-#define NEURONSPI_FUNGROUP_RS485                               7
+#define NEURONSPI_FUNGROUP_RS485               7
 #define NEURONSPI_REGFUN_TX_QUEUE_LEN          0 | NEURONSPI_FUNGROUP_RS485 << 8
 #define NEURONSPI_REGFUN_RS485_CONFIG          1 | NEURONSPI_FUNGROUP_RS485 << 8
 #define NEURONSPI_REGFUN_RS485_ADDRESS         2 | NEURONSPI_FUNGROUP_RS485 << 8
 
 // Secondary Analog Output Functions
-#define NEURONSPI_FUNGROUP_AO_VER2                             8
+#define NEURONSPI_FUNGROUP_AO_VER2             8
 #define NEURONSPI_REGFUN_AO_VER2_RW                    0 | NEURONSPI_FUNGROUP_AO_VER2 << 8
 
 // Secondary Analog Input Functions
-#define NEURONSPI_FUNGROUP_AI_VER2                             9
+#define NEURONSPI_FUNGROUP_AI_VER2             9
 #define NEURONSPI_REGFUN_AI_VER2_READ_LOWER    0 | NEURONSPI_FUNGROUP_AI_VER2 << 8
-#define NEURONSPI_REGFUN_AI_VER2_READ_UPPER    0 | NEURONSPI_FUNGROUP_AI_VER2 << 8
-#define NEURONSPI_REGFUN_AI_VER2_MODE          1 | NEURONSPI_FUNGROUP_AI_VER2 << 8
+#define NEURONSPI_REGFUN_AI_VER2_READ_UPPER    1 | NEURONSPI_FUNGROUP_AI_VER2 << 8
+#define NEURONSPI_REGFUN_AI_VER2_MODE          2 | NEURONSPI_FUNGROUP_AI_VER2 << 8
 
 // Register access flags
 #define NEURONSPI_REGFLAG_ACC_NEVER    0
@@ -306,7 +306,7 @@ extern struct neuronspi_board_combination NEURONSPI_MODEL_L403_HW_DEFINITION_BOA
 #define NEURONSPI_MODEL_L503_HW_DEFINITION_BOARD_SIZE 3
 extern struct neuronspi_board_combination NEURONSPI_MODEL_L503_HW_DEFINITION_BOARD[NEURONSPI_MODEL_L503_HW_DEFINITION_BOARD_SIZE];
 #define NEURONSPI_MODEL_L513_HW_DEFINITION_BOARD_SIZE 3
-extern struct neuronspi_board_combination NEURONSPI_MODEL_L513_HW_DEFINITION_BOARD[];
+extern struct neuronspi_board_combination NEURONSPI_MODEL_L513_HW_DEFINITION_BOARD[NEURONSPI_MODEL_L513_HW_DEFINITION_BOARD_SIZE];
 
 // Board table
 #define NEURONSPI_BOARDTABLE_LEN               16

diff --git a/modules/unipi/src/unipi_sysfs.c b/modules/unipi/src/unipi_sysfs.c
index 484ea9e5346b79ea0307f8b50877edd896f61f10..56f422adb0929e517efa99112c5134276505530f 100644 (file)
--- a/modules/unipi/src/unipi_sysfs.c
+++ b/modules/unipi/src/unipi_sysfs.c
@@ -92,7 +92,7 @@ static ssize_t neuronspi_spi_show_fw_version(struct device *dev, struct device_a
        n_spi = platform_get_drvdata(plat);
        if (n_spi && n_spi->combination_id != 0xFF && n_spi->reg_map) {
                regmap_read(n_spi->reg_map, n_spi->regstart_table->sys_sw_ver, &val);
-               ret = scnprintf(buf, 255, "%x.%x%x\n", (val & 0xF00) >> 8, (val & 0xF0) >> 4, val & 0xF);
+               ret = scnprintf(buf, 255, "%x.%d\n", (val & 0xF00) >> 8, (int)(val & 0xFF));
        }
        return ret;
 }

diff --git a/modules/unipi/src/unipi_uart.c b/modules/unipi/src/unipi_uart.c
index 9376904dfabecb97c200116aee876815df6f4cfc..d117f4ad0971bcd8235565eed3d40297340a1e0a 100644 (file)
--- a/modules/unipi/src/unipi_uart.c
+++ b/modules/unipi/src/unipi_uart.c
@@ -154,7 +154,7 @@ void neuronspi_uart_set_termios(struct uart_port *port, struct ktermios *termios
                        neuronspi_uart_set_ldisc(port, termios);
                }
        }
-       n_port->baud = uart_get_baud_rate(port, termios, old, 2400, 115200);
+       n_port->baud = uart_get_baud_rate(port, termios, old, 134, 115200);
        uart_update_timeout(port, termios->c_cflag, n_port->baud);
 }