Added SYSFS support for LEDs > 4

diff --git a/modules/unipi/src/unipi_common.h b/modules/unipi/src/unipi_common.h
index 52cfdcd710cfa8727c8c6d1aafc4a8f35c52b1f7..62e743cc37ba8da122de6a9ab3c1c9e7d19b74ac 100644 (file)
--- a/modules/unipi/src/unipi_common.h
+++ b/modules/unipi/src/unipi_common.h
@@ -51,7 +51,7 @@
 #if NEURONSPI_SCHED_REQUIRED > 0
        #include <uapi/linux/sched/types.h>
 #endif
-#define NEURONSPI_MAJOR_VERSIONSTRING "Development Beta Version 0.08:18:05:2018"
+#define NEURONSPI_MAJOR_VERSIONSTRING "Development Beta Version 0.09:28:05:2018"
 
 #define NEURONSPI_MAX_DEVS                             3
 #define NEURONSPI_MAX_UART                             128

diff --git a/modules/unipi/src/unipi_platform.c b/modules/unipi/src/unipi_platform.c
index b0c3813d20788b615ba76c7d3ac0ce3f758c499c..48463be42c34ea0533161a5ff421262009e49ba8 100644 (file)
--- a/modules/unipi/src/unipi_platform.c
+++ b/modules/unipi/src/unipi_platform.c
@@ -138,7 +138,7 @@ static u32 NEURONSPI_BOARD_E8DI8RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E8DI8RO_H
                NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 16
                NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 17
                NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 18
-               1000, 17, // Register block beginning and size
+               1000, 21, // Register block beginning and size
                NEURONSPI_REGFUN_SW_VER | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                 // 1000
                NEURONSPI_REGFUN_DIDO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,             // 1001
                NEURONSPI_REGFUN_UAIO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,             // 1002
@@ -194,11 +194,13 @@ static u32 NEURONSPI_BOARD_E8DI8RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E8DI8RO_H
 struct neuronspi_board_combination NEURONSPI_BOARD_E8DI8RO_HW_COMBINATION[] = {NEURONSPI_BOARD_E8DI8RO_HW_DEFINITION};
 
 // E-14Ro
-#define NEURONSPI_BOARD_E14RO_HW_DEFINITION_BLOCK_SIZE 15
+#define NEURONSPI_BOARD_E14RO_HW_DEFINITION_BLOCK_SIZE 17
 static u32 NEURONSPI_BOARD_E14RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E14RO_HW_DEFINITION_BLOCK_SIZE] = {
-               0, 1,   // Register block beginning and size
-               NEURONSPI_REGFUN_NONE_TEST | NEURONSPI_REGFLAG_ACC_ONCE,                                                                                // 0
-               1000, 10,
+               0, 3,   // Register block beginning and size
+               NEURONSPI_REGFUN_DO_RW | NEURONSPI_REGFLAG_ACC_10HZ,                                                                                    // 0
+               NEURONSPI_REGFUN_MWD_STATUS | NEURONSPI_REGFLAG_ACC_6SEC | NEURONSPI_REGFLAG_SYS_READ_ONLY,     // 1
+               NEURONSPI_REGFUN_LED_RW | NEURONSPI_REGFLAG_ACC_1HZ,                                                                    // 2
+               1000, 10, // Register block beginning and size
                NEURONSPI_REGFUN_SW_VER | NEURONSPI_REGFLAG_ACC_ONCE,                                                                                   // 1000
                NEURONSPI_REGFUN_DIDO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE,                                                                               // 1001
                NEURONSPI_REGFUN_UAIO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE,                                                                               // 1002
@@ -243,21 +245,70 @@ static u32 NEURONSPI_BOARD_E14RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E14RO_HW_DE
 struct neuronspi_board_combination NEURONSPI_BOARD_E14RO_HW_COMBINATION[] = {NEURONSPI_BOARD_E14RO_HW_DEFINITION};
 
 // E-16Di
-#define NEURONSPI_BOARD_E16DI_HW_DEFINITION_BLOCK_SIZE 15
+#define NEURONSPI_BOARD_E16DI_HW_DEFINITION_BLOCK_SIZE 64
 static u32 NEURONSPI_BOARD_E16DI_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E16DI_HW_DEFINITION_BLOCK_SIZE] = {
-               0, 1,   // Register block beginning and size
-               NEURONSPI_REGFUN_NONE_TEST | NEURONSPI_REGFLAG_ACC_ONCE,                                                                                // 0
-               1000, 10,
-               NEURONSPI_REGFUN_SW_VER | NEURONSPI_REGFLAG_ACC_ONCE,                                                                                   // 1000
-               NEURONSPI_REGFUN_DIDO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE,                                                                               // 1001
-               NEURONSPI_REGFUN_UAIO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE,                                                                               // 1002
-               NEURONSPI_REGFUN_HW_VER | NEURONSPI_REGFLAG_ACC_ONCE,                                                                                   // 1003
-               NEURONSPI_REGFUN_FLASH_HW_VER | NEURONSPI_REGFLAG_ACC_ONCE,                                                                     // 1004
-               NEURONSPI_REGFUN_SERIAL_NR_LOWER | NEURONSPI_REGFLAG_ACC_ONCE,                                                                  // 1005
-               NEURONSPI_REGFUN_SERIAL_NR_UPPER | NEURONSPI_REGFLAG_ACC_ONCE,                                                                  // 1006
+               0, 34,  // Register block beginning and size
+               NEURONSPI_REGFUN_DI_READ | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,                // 0
+               NEURONSPI_REGFUN_MWD_STATUS | NEURONSPI_REGFLAG_ACC_6SEC,                                                                               // 1
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 2
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 3
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 4
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 5
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 6
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 7
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 8
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 9
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 10
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 11
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 12
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 13
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 14
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 15
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 16
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 17
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 18
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 19
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 20
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 21
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 22
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 23
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 24
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 25
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 26
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 27
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 28
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 29
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 30
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 31
+               NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 32
+               NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                 // 33
+               1000, 26, // Register block beginning and size
+               NEURONSPI_REGFUN_SW_VER | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                 // 1000
+               NEURONSPI_REGFUN_DIDO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,             // 1001
+               NEURONSPI_REGFUN_UAIO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,             // 1002
+               NEURONSPI_REGFUN_HW_VER | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                 // 1003
+               NEURONSPI_REGFUN_FLASH_HW_VER | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,   // 1004
+               NEURONSPI_REGFUN_SERIAL_NR_LOWER | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,// 1005
+               NEURONSPI_REGFUN_SERIAL_NR_UPPER | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,// 1006
                NEURONSPI_REGFUN_INTERRUPTS | NEURONSPI_REGFLAG_ACC_AFAP,                                                                               // 1007
                NEURONSPI_REGFUN_MWD_TO | NEURONSPI_REGFLAG_ACC_6SEC,                                                                                   // 1008
-               NEURONSPI_REGFUN_V_REF_INT | NEURONSPI_REGFLAG_ACC_ONCE,                                                                                // 1009
+               NEURONSPI_REGFUN_V_REF_INT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,              // 1009
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1010
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1011
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1012
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1013
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1014
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1015
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1016
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1017
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1018
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1019
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1020
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1021
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1022
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1023
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1024
+               NEURONSPI_REGFUN_DI_DEBOUNCE | NEURONSPI_REGFLAG_ACC_6SEC,                                                                              // 1025
 };
 
 #define NEURONSPI_BOARD_E16DI_HW_FEATURES {    \
@@ -995,11 +1046,23 @@ static u32 NEURONSPI_BOARD_E16DIU14DI_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E16DIU
 struct neuronspi_board_combination NEURONSPI_BOARD_E16DIU14DI_HW_COMBINATION[] = {NEURONSPI_BOARD_E16DIU14DI_HW_DEFINITION};
 
 // E-4Ai4Ao
-#define NEURONSPI_BOARD_E4AI4AO_HW_DEFINITION_BLOCK_SIZE 15
+#define NEURONSPI_BOARD_E4AI4AO_HW_DEFINITION_BLOCK_SIZE 31
 static u32 NEURONSPI_BOARD_E4AI4AO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4AI4AO_HW_DEFINITION_BLOCK_SIZE] = {
-               0, 1,   // Register block beginning and size
-               NEURONSPI_REGFUN_DO_RW | NEURONSPI_REGFLAG_ACC_10HZ | NEURONSPI_REGFLAG_SYS_READ_ONLY,                  // 0
-               1000, 10, // Register block beginning and size
+               0, 13,  // Register block beginning and size
+               NEURONSPI_REGFUN_AO_VER2_RW | NEURONSPI_REGFLAG_ACC_10HZ,                                                                                       // 0
+               NEURONSPI_REGFUN_AO_VER2_RW | NEURONSPI_REGFLAG_ACC_10HZ,                                                                                       // 1
+               NEURONSPI_REGFUN_AO_VER2_RW | NEURONSPI_REGFLAG_ACC_10HZ,                                                                                       // 2
+               NEURONSPI_REGFUN_AO_VER2_RW | NEURONSPI_REGFLAG_ACC_10HZ,                                                                                       // 3
+               NEURONSPI_REGFUN_AI_VER2_READ_LOWER | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,     // 4
+               NEURONSPI_REGFUN_AI_VER2_READ_UPPER | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,     // 5
+               NEURONSPI_REGFUN_AI_VER2_READ_LOWER | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,     // 6
+               NEURONSPI_REGFUN_AI_VER2_READ_UPPER | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,     // 7
+               NEURONSPI_REGFUN_AI_VER2_READ_LOWER | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,     // 8
+               NEURONSPI_REGFUN_AI_VER2_READ_UPPER | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,     // 9
+               NEURONSPI_REGFUN_AI_VER2_READ_LOWER | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,     // 10
+               NEURONSPI_REGFUN_AI_VER2_READ_UPPER | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,     // 11
+               NEURONSPI_REGFUN_MWD_STATUS | NEURONSPI_REGFLAG_ACC_6SEC,                                                                                       // 12
+               1000, 14, // Register block beginning and size
                NEURONSPI_REGFUN_SW_VER | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                 // 1000
                NEURONSPI_REGFUN_DIDO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,             // 1001
                NEURONSPI_REGFUN_UAIO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,             // 1002
@@ -1010,6 +1073,10 @@ static u32 NEURONSPI_BOARD_E4AI4AO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4AI4AO_H
                NEURONSPI_REGFUN_INTERRUPTS | NEURONSPI_REGFLAG_ACC_AFAP,                                                                               // 1007
                NEURONSPI_REGFUN_MWD_TO | NEURONSPI_REGFLAG_ACC_6SEC,                                                                                   // 1008
                NEURONSPI_REGFUN_V_REF_INT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,              // 1009
+               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1010
+               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1011
+               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1012
+               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1013
 };
 
 #define NEURONSPI_BOARD_E4AI4AO_HW_FEATURES {  \
@@ -1017,7 +1084,7 @@ static u32 NEURONSPI_BOARD_E4AI4AO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4AI4AO_H
                .ro_count =                                       0,    \
                .ds_count =                                       0,    \
                .di_count =                                       0,    \
-               .led_count =                              0,    \
+               .led_count =                              14,   \
                .stm_ai_count =                           0,    \
                .stm_ao_count =                           0,    \
                .sec_ai_count =                           4,    \

diff --git a/modules/unipi/src/unipi_spi.c b/modules/unipi/src/unipi_spi.c
index 6bdb00565ab9ea4ed049b66efb81efdf51a02fd5..cfaf44d7b0ba3912701fcff88de5b7c96872762b 100644 (file)
--- a/modules/unipi/src/unipi_spi.c
+++ b/modules/unipi/src/unipi_spi.c
@@ -846,7 +846,11 @@ void neuronspi_spi_led_set_brightness(struct spi_device* spi_dev, enum led_brigh
        message_buf = kzalloc(NEURONSPI_SPI_LED_SET_MESSAGE_LEN, GFP_KERNEL);
        recv_buf = kzalloc(NEURONSPI_SPI_LED_SET_MESSAGE_LEN, GFP_KERNEL);
        memcpy(message_buf, NEURONSPI_SPI_LED_SET_MESSAGE, NEURONSPI_SPI_LED_SET_MESSAGE_LEN);
-       message_buf[2] += id;
+       if (d_data->features != NULL) {
+               message_buf[2] = d_data->features->di_count + d_data->features->do_count + d_data->features->ro_count + id;
+       } else {
+               message_buf[2] += id;
+       }
        if (brightness > 0) {
                message_buf[1] = 0x01;
        } else {
@@ -1165,7 +1169,11 @@ reg1001: %x, reg1002: %x, reg1003: %x, reg1004: %x\n",
                if (n_spi->features->led_count) {
                        for (i = 0; i < n_spi->features->led_count; i++) {
                                strcpy(n_spi->led_driver[i].name, "neuron:green:uled-x1");
-                               n_spi->led_driver[i].name[19] = i + '1';
+                               if (i < 9) {
+                                       n_spi->led_driver[i].name[19] = i + '1';
+                               } else {
+                                       n_spi->led_driver[i].name[19] = i - 9 + 'a';
+                               }
                                // Initialise the rest of the structure
                                n_spi->led_driver[i].id = i;
                                n_spi->led_driver[i].brightness = LED_OFF;

diff --git a/version.txt b/version.txt
index 54a8e69d6883744dc9bba635385b24248d15339e..d0244adcfdf3e841a9e70be0faafe41cefb58d49 100644 (file)
--- a/version.txt
+++ b/version.txt
@@ -1 +1 @@
-Repository:neuron-kernel ActiveBranch:[master] PrecedingRevision:35(f15308f) LatestCommit:Tue May 22 16:28:28 CEST 2018
+Repository:neuron-kernel ActiveBranch:[master] PrecedingRevision:36(927ac0d) LatestCommit:Mon May 28 16:04:26 CEST 2018