Fix sysfs for E4Ai4Ao_U4Di5Ro

diff --git a/modules/unipi/src/unipi_common.h b/modules/unipi/src/unipi_common.h
index 0196f87fea896d6a7104fb4bce6d175d19360e20..9c16d4872e48ee7cd241f8a848de92c748512f60 100644 (file)
--- a/modules/unipi/src/unipi_common.h
+++ b/modules/unipi/src/unipi_common.h
@@ -52,7 +52,7 @@
 #if NEURONSPI_SCHED_REQUIRED > 0
        #include <uapi/linux/sched/types.h>
 #endif
-#define NEURONSPI_MAJOR_VERSIONSTRING "Version 1.37:2020:01:22"
+#define NEURONSPI_MAJOR_VERSIONSTRING "Version 1.43:2020:03:06"
 
 #define NEURONSPI_MAX_DEVS                             3
 #define NEURONSPI_MAX_UART                             16

diff --git a/modules/unipi/src/unipi_platform.c b/modules/unipi/src/unipi_platform.c
index 856165aabaf6fe97ef03781b35d2754e7e46ff68..7becd5a5ffec7e5bdcf5b97045d165a38de9b77b 100644 (file)
--- a/modules/unipi/src/unipi_platform.c
+++ b/modules/unipi/src/unipi_platform.c
@@ -1429,7 +1429,7 @@ static u32 NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4
 struct neuronspi_board_combination NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_COMBINATION[] = {NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_DEFINITION};
 
 // E-4Ai4Ao_P-4Di5Ro (xS5x) 
-#define NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_DEFINITION_BLOCK_SIZE 50
+#define NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_DEFINITION_BLOCK_SIZE 52
 static u32 NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_DEFINITION_BLOCK_SIZE] = {
                0, 23,  // Register block beginning and size
                NEURONSPI_REGFUN_DI_READ | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,                        // 0
@@ -1455,7 +1455,7 @@ static u32 NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4
                NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                         // 20
                NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                         // 21
                NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                         // 22
-               1000, 23, // Register block beginning and size
+               1000, 25, // Register block beginning and size
                NEURONSPI_REGFUN_SW_VER | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                 // 1000
                NEURONSPI_REGFUN_DIDO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,             // 1001
                NEURONSPI_REGFUN_UAIO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,             // 1002
@@ -1473,12 +1473,14 @@ static u32 NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4
                NEURONSPI_REGFUN_DS_ENABLE   | NEURONSPI_REGFLAG_ACC_1HZ,                                                                               // 1014
                NEURONSPI_REGFUN_DS_POLARITY | NEURONSPI_REGFLAG_ACC_1HZ,                                                                               // 1015
                NEURONSPI_REGFUN_DS_TOGGLE   | NEURONSPI_REGFLAG_ACC_1HZ,                                                                               // 1016
-               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1017
-               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1018
+               NEURONSPI_REGFUN_SPECIAL_NONE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                                            // 1017
+               NEURONSPI_REGFUN_SPECIAL_NONE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                                            // 1018
                NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1019
                NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1020
-               NEURONSPI_REGFUN_RS485_CONFIG | NEURONSPI_REGFLAG_ACC_6SEC,                                                                             // 1021
-               NEURONSPI_REGFUN_RS485_ADDRESS | NEURONSPI_REGFLAG_ACC_6SEC                                                                             // 1022
+               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1021
+               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                              // 1022
+               NEURONSPI_REGFUN_RS485_CONFIG | NEURONSPI_REGFLAG_ACC_6SEC,                                                                             // 1023
+               NEURONSPI_REGFUN_RS485_ADDRESS | NEURONSPI_REGFLAG_ACC_6SEC                                                                             // 1024
 };
 
 #define NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_FEATURES {   \
@@ -1514,7 +1516,7 @@ static u32 NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4
 struct neuronspi_board_combination NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_COMBINATION[] = {NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_DEFINITION};
 
 // E-4Ai4Ao_U-4Di5Ro (L5x3)
-#define NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_DEFINITION_BLOCK_SIZE 50
+#define NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_DEFINITION_BLOCK_SIZE 52
 static u32 NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_DEFINITION_BLOCK_SIZE] = {
                0, 24,  // Register block beginning and size
                NEURONSPI_REGFUN_DI_READ | NEURONSPI_REGFLAG_ACC_AFAP | NEURONSPI_REGFLAG_SYS_READ_ONLY,                                // 0
@@ -1541,7 +1543,7 @@ static u32 NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4
                NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                                 // 21
                NEURONSPI_REGFUN_DI_COUNTER_LOWER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                                 // 22
                NEURONSPI_REGFUN_DI_COUNTER_UPPER | NEURONSPI_REGFLAG_ACC_6SEC,                                                                                 // 23
-               1000, 22, // Register block beginning and size
+               1000, 24, // Register block beginning and size
                NEURONSPI_REGFUN_SW_VER | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                                 // 1000
                NEURONSPI_REGFUN_DIDO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                             // 1001
                NEURONSPI_REGFUN_UAIO_COUNT | NEURONSPI_REGFLAG_ACC_ONCE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                             // 1002
@@ -1559,11 +1561,13 @@ static u32 NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4
                NEURONSPI_REGFUN_DS_ENABLE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                                                 // 1014
                NEURONSPI_REGFUN_DS_POLARITY | NEURONSPI_REGFLAG_ACC_1HZ,                                                                                               // 1015
                NEURONSPI_REGFUN_DS_TOGGLE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                                                 // 1016
-               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                                              // 1017
-               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                                              // 1018
+               NEURONSPI_REGFUN_SPECIAL_NONE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                                                    // 1017
+               NEURONSPI_REGFUN_SPECIAL_NONE | NEURONSPI_REGFLAG_SYS_READ_ONLY,                                                    // 1018
                NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                                              // 1019
                NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                                              // 1020
-               NEURONSPI_REGFUN_RS485_CONFIG | NEURONSPI_REGFLAG_ACC_6SEC                                                                                              // 1021
+               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                                              // 1021
+               NEURONSPI_REGFUN_AI_VER2_MODE | NEURONSPI_REGFLAG_ACC_1HZ,                                                                                              // 1022
+               NEURONSPI_REGFUN_RS485_CONFIG | NEURONSPI_REGFLAG_ACC_6SEC                                                                                              // 1023
 };
 
 #define NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_FEATURES {   \

diff --git a/modules/unipi/src/unipi_platform.h b/modules/unipi/src/unipi_platform.h
index c90f69a9206702a94d4a5d4a605e813eacb77978..e99796c7758bc9e52b0d7124170b702370bc8904 100644 (file)
--- a/modules/unipi/src/unipi_platform.h
+++ b/modules/unipi/src/unipi_platform.h
@@ -255,6 +255,10 @@ struct neuronspi_board_device_data {
 #define NEURONSPI_REGFUN_AI_VER2_READ_UPPER    1 | NEURONSPI_FUNGROUP_AI_VER2 << 8
 #define NEURONSPI_REGFUN_AI_VER2_MODE          2 | NEURONSPI_FUNGROUP_AI_VER2 << 8
 
+// Special Functions
+#define NEURONSPI_FUNGROUP_SPECIAL             127
+#define NEURONSPI_REGFUN_SPECIAL_NULL  0 | NEURONSPI_FUNGROUP_SPECIAL << 8
+
 // Register access flags
 #define NEURONSPI_REGFLAG_ACC_NEVER    0
 #define NEURONSPI_REGFLAG_ACC_AFAP     0x1 << 16