NEURONSPI_BOARD_B1000_HW_DEFINITION, NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_DEFINITION, NEURONSPI_BOARD_E14ROU14DI_HW_DEFINITION
};
+struct neuronspi_board_combination NEURONSPI_MODEL_L533_HW_DEFINITION_BOARD[NEURONSPI_MODEL_L533_HW_DEFINITION_BOARD_SIZE] = {
+ NEURONSPI_BOARD_B1000_HW_DEFINITION, NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_DEFINITION, NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_DEFINITION
+};
+
// Board table
// Column 4 is the number of 0-indexed registers and column 5 is the number of 1000-indexed ones
struct neuronspi_board_entry NEURONSPI_BOARDTABLE[NEURONSPI_BOARDTABLE_LEN] = {
.data_register_count = 21, .config_register_count = 8, .definition = NEURONSPI_BOARD_E4LIGHT_HW_COMBINATION}, // E-4Light (M603)
{.index = 15, .lower_board_id = NEURONSPI_BOARD_LOWER_E4AI4AO_ID, .upper_board_id = NEURONSPI_BOARD_UPPER_U6DI5RO_ID,
.data_register_count = 28, .config_register_count = 24, .definition = NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_COMBINATION}, // E-4Ai4Ao_U-6Di5Ro (M503)
- {.index = 16, .lower_board_id = NEURONSPI_BOARD_LOWER_E4AI4AO_ID, .upper_board_id = NEURONSPI_BOARD_UPPER_P4DI5RO_ID,
+ {.index = 18, .lower_board_id = NEURONSPI_BOARD_LOWER_E4AI4AO_ID, .upper_board_id = NEURONSPI_BOARD_UPPER_P4DI5RO_ID,
.data_register_count = 23, .config_register_count = 23, .definition = NEURONSPI_BOARD_E4AI4AOP4DI5RO_HW_COMBINATION}, // E-4Ai4Ao_P-4Di5Ro (xS5x)
- {.index = 17, .lower_board_id = NEURONSPI_BOARD_LOWER_E4AI4AO_ID, .upper_board_id = NEURONSPI_BOARD_UPPER_U4DI5RO_ID,
+ {.index = 19, .lower_board_id = NEURONSPI_BOARD_LOWER_E4AI4AO_ID, .upper_board_id = NEURONSPI_BOARD_UPPER_U4DI5RO_ID,
.data_register_count = 24, .config_register_count = 22, .definition = NEURONSPI_BOARD_E4AI4AOU4DI5RO_HW_COMBINATION} // E-4Ai4Ao_U-4Di5Ro (M5x3)
};
{.eeprom_length = 4, .eeprom_name = "L205", .name_length = 9, .model_name = "Axon L205", .first_cs = 1,
.combination_count = 3, .combinations = NEURONSPI_MODEL_L205_HW_DEFINITION_BOARD},
{.eeprom_length = 4, .eeprom_name = "L505", .name_length = 9, .model_name = "Axon L503", .first_cs = 1,
- .combination_count = 3, .combinations = NEURONSPI_MODEL_L505_HW_DEFINITION_BOARD}
+ .combination_count = 3, .combinations = NEURONSPI_MODEL_L505_HW_DEFINITION_BOARD},
+ {.eeprom_length = 4, .eeprom_name = "L533", .name_length = 11, .model_name = "Neuron L533", .first_cs = 0,
+ .combination_count = 3, .combinations = NEURONSPI_MODEL_L533_HW_DEFINITION_BOARD}
};
/************************
extern struct neuronspi_board_combination NEURONSPI_MODEL_L205_HW_DEFINITION_BOARD[NEURONSPI_MODEL_L205_HW_DEFINITION_BOARD_SIZE];
#define NEURONSPI_MODEL_L505_HW_DEFINITION_BOARD_SIZE 3
extern struct neuronspi_board_combination NEURONSPI_MODEL_L505_HW_DEFINITION_BOARD[NEURONSPI_MODEL_L505_HW_DEFINITION_BOARD_SIZE];
+#define NEURONSPI_MODEL_L533_HW_DEFINITION_BOARD_SIZE 3
+extern struct neuronspi_board_combination NEURONSPI_MODEL_L533_HW_DEFINITION_BOARD[NEURONSPI_MODEL_L533_HW_DEFINITION_BOARD_SIZE];
// Board table
#define NEURONSPI_BOARDTABLE_LEN 18
extern struct neuronspi_board_entry NEURONSPI_BOARDTABLE[];
// Module table
-#define NEURONSPI_MODELTABLE_LEN 28
+#define NEURONSPI_MODELTABLE_LEN 29
extern struct neuronspi_model_definition NEURONSPI_MODELTABLE[];
/*************************