From 201396f6da4c8c89f73f3b58e60468891f535517 Mon Sep 17 00:00:00 2001 From: Tom Knot Date: Tue, 27 Feb 2018 16:27:53 +0100 Subject: [PATCH] Finished refactoring into individual files --- .gitignore | 4 +- modules/neuron_spi/src/unipi_common.h | 42 +++++--- modules/neuron_spi/src/unipi_gpio.c | 12 +++ modules/neuron_spi/src/unipi_gpio.h | 8 ++ modules/neuron_spi/src/unipi_iio.c | 7 ++ modules/neuron_spi/src/unipi_iio.h | 8 ++ modules/neuron_spi/src/unipi_misc.c | 21 +++- modules/neuron_spi/src/unipi_misc.h | 20 +++- modules/neuron_spi/src/unipi_platform.c | 48 ++++++--- modules/neuron_spi/src/unipi_platform.h | 116 +++++++++++----------- modules/neuron_spi/src/unipi_spi.c | 25 ++--- modules/neuron_spi/src/unipi_spi.h | 39 +++----- modules/neuron_spi/src/unipi_sysfs.c | 10 ++ modules/neuron_spi/src/unipi_sysfs.h | 4 + modules/neuron_spi/src/unipi_uart.c | 123 +++++++++++++----------- modules/neuron_spi/src/unipi_uart.h | 19 +++- 16 files changed, 322 insertions(+), 184 deletions(-) diff --git a/.gitignore b/.gitignore index c8b38e3..d167d40 100644 --- a/.gitignore +++ b/.gitignore @@ -1,2 +1,4 @@ *.o -*.ko \ No newline at end of file +*.ko +*.rc +*/bin/* \ No newline at end of file diff --git a/modules/neuron_spi/src/unipi_common.h b/modules/neuron_spi/src/unipi_common.h index eed7e08..1b6fe16 100644 --- a/modules/neuron_spi/src/unipi_common.h +++ b/modules/neuron_spi/src/unipi_common.h @@ -1,13 +1,24 @@ /* - * unipi_common.h + * UniPi Neuron tty serial driver - Copyright (C) 2018 UniPi Technologies + * Author: Tomas Knot + * + * Based on the SC16IS7xx driver by Jon Ringle , + * which was in turn based on max310x.c, by Alexander Shiyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * Created on: 26 Feb 2018 - * Author: Tom Knot */ #ifndef MODULES_NEURON_SPI_SRC_UNIPI_COMMON_H_ #define MODULES_NEURON_SPI_SRC_UNIPI_COMMON_H_ +/************ + * Includes * + ************/ + #include #include #include @@ -35,8 +46,8 @@ /*************** * Definitions * ***************/ -#define NEURONSPI_SCHED_REQUIRED 0 // Older kernels do not require sched/types to be specifically imported +#define NEURONSPI_SCHED_REQUIRED 0 // Older kernels do not require sched/types to be specifically imported #define NEURONSPI_MAJOR_VERSIONSTRING "Development Beta Version 0.02:12:02:2018" #define NEURONSPI_MAX_DEVS 3 @@ -55,7 +66,6 @@ #define NEURONSPI_DETAILED_DEBUG 0 #define NEURONSPI_LAST_TRANSFER_DELAY 40 - #define NEURON_DEVICE_NAME "neuronspi" #define NEURON_DEVICE_CLASS "modbus_spi" #define NEURON_DRIVER_NAME "NEURONSPI" @@ -66,11 +76,19 @@ #define NEURONSPI_GET_COIL_READ_PHASE2_BYTE_LENGTH(X) ((((X) + 15) >> 4) << 1) +/******************** + * Module Constants * + ********************/ + #define NEURONSPI_NO_INTERRUPT_MODELS_LEN 3 static const u16 NEURONSPI_NO_INTERRUPT_MODELS[NEURONSPI_NO_INTERRUPT_MODELS_LEN] = { 0xb10, 0xc10, 0xf10 }; +/******************* + * Data Structures * + *******************/ + enum neuron_str_attribute_type { NEURON_SATTR_MODEL, NEURON_SATTR_EEPROM, @@ -117,7 +135,6 @@ struct neuronspi_uart_data u8 p_count; }; - // Instantiated once struct neuronspi_char_driver { @@ -129,7 +146,6 @@ struct neuronspi_char_driver struct device* dev; }; - // Instantiated once per SPI device struct neuronspi_driver_data { @@ -250,8 +266,6 @@ struct neuronspi_led_driver spinlock_t lock; }; -extern struct mutex neuronspi_master_mutex; - struct neuronspi_file_data { struct spi_device** spi_device; @@ -267,13 +281,19 @@ struct neuronspi_direct_acc u32 size; }; +/********************* + * Data Declarations * + *********************/ + +extern struct mutex neuronspi_master_mutex; extern struct neuronspi_char_driver neuronspi_cdrv; extern struct spinlock* neuronspi_spi_w_spinlock; +extern struct spi_device* neuronspi_s_dev[NEURONSPI_MAX_DEVS]; +extern struct task_struct *neuronspi_invalidate_thread; + extern u8 neuronspi_spi_w_flag; extern u8 neuronspi_probe_count; extern int neuronspi_model_id; extern spinlock_t neuronspi_probe_spinlock; -extern struct spi_device* neuronspi_s_dev[NEURONSPI_MAX_DEVS]; -extern struct task_struct *neuronspi_invalidate_thread; #endif /* MODULES_NEURON_SPI_SRC_UNIPI_COMMON_H_ */ diff --git a/modules/neuron_spi/src/unipi_gpio.c b/modules/neuron_spi/src/unipi_gpio.c index 9716a78..7e69a0c 100644 --- a/modules/neuron_spi/src/unipi_gpio.c +++ b/modules/neuron_spi/src/unipi_gpio.c @@ -12,15 +12,25 @@ * */ +/************ + * Includes * + ************/ + #include "unipi_gpio.h" #include "unipi_spi.h" +/************************ + * Non-static Functions * + ************************/ + int neuronspi_gpio_di_direction_input(struct gpio_chip *chip, unsigned offset) { return 0; } + int neuronspi_gpio_di_direction_output(struct gpio_chip *chip, unsigned offset, int value) { return -EINVAL; } + int neuronspi_gpio_di_get(struct gpio_chip *chip, unsigned offset) { struct neuronspi_di_driver *n_di = gpiochip_get_data(chip); struct spi_device *spi = n_di->spi; @@ -30,6 +40,7 @@ int neuronspi_gpio_di_get(struct gpio_chip *chip, unsigned offset) { int neuronspi_gpio_do_direction_output(struct gpio_chip *chip, unsigned offset, int value) { return 0; } + void neuronspi_gpio_do_set(struct gpio_chip *chip, unsigned offset, int value) { struct neuronspi_do_driver *n_do = gpiochip_get_data(chip); struct spi_device *spi = n_do->spi; @@ -39,6 +50,7 @@ void neuronspi_gpio_do_set(struct gpio_chip *chip, unsigned offset, int value) { int neuronspi_gpio_ro_direction_output(struct gpio_chip *chip, unsigned offset, int value) { return 0; } + void neuronspi_gpio_ro_set(struct gpio_chip *chip, unsigned offset, int value) { struct neuronspi_ro_driver *n_ro = gpiochip_get_data(chip); struct spi_device *spi = n_ro->spi; diff --git a/modules/neuron_spi/src/unipi_gpio.h b/modules/neuron_spi/src/unipi_gpio.h index 471f07e..508fd78 100644 --- a/modules/neuron_spi/src/unipi_gpio.h +++ b/modules/neuron_spi/src/unipi_gpio.h @@ -15,6 +15,10 @@ #ifndef MODULES_NEURON_SPI_SRC_UNIPI_GPIO_H_ #define MODULES_NEURON_SPI_SRC_UNIPI_GPIO_H_ +/************ + * Includes * + ************/ + #include #include #include @@ -41,6 +45,10 @@ #include "unipi_common.h" +/************************* + * Function Declarations * + *************************/ + int neuronspi_gpio_di_direction_input(struct gpio_chip *chip, unsigned offset); int neuronspi_gpio_di_direction_output(struct gpio_chip *chip, unsigned offset, int value); int neuronspi_gpio_di_get(struct gpio_chip *chip, unsigned offset); diff --git a/modules/neuron_spi/src/unipi_iio.c b/modules/neuron_spi/src/unipi_iio.c index 340594d..eca3eae 100644 --- a/modules/neuron_spi/src/unipi_iio.c +++ b/modules/neuron_spi/src/unipi_iio.c @@ -12,9 +12,16 @@ * */ +/************ + * Includes * + ************/ + #include "unipi_iio.h" #include "unipi_spi.h" +/************************ + * Non-static Functions * + ************************/ int neuronspi_iio_stm_ai_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *ch, int *val, int *val2, long mask) { struct neuronspi_stm_ai_data *ai_data = iio_priv(indio_dev); diff --git a/modules/neuron_spi/src/unipi_iio.h b/modules/neuron_spi/src/unipi_iio.h index bd700ac..c6e96c9 100644 --- a/modules/neuron_spi/src/unipi_iio.h +++ b/modules/neuron_spi/src/unipi_iio.h @@ -15,6 +15,10 @@ #ifndef MODULES_NEURON_SPI_SRC_UNIPI_IIO_H_ #define MODULES_NEURON_SPI_SRC_UNIPI_IIO_H_ +/************ + * Includes * + ************/ + #include #include #include @@ -41,6 +45,10 @@ #include "unipi_common.h" +/************************* + * Function Declarations * + *************************/ + int neuronspi_iio_stm_ai_read_raw(struct iio_dev *iio_dev, struct iio_chan_spec const *ch, int *val, int *val2, long mask); int neuronspi_iio_stm_ao_read_raw(struct iio_dev *iio_dev, struct iio_chan_spec const *ch, int *val, int *val2, long mask); int neuronspi_iio_stm_ao_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask); diff --git a/modules/neuron_spi/src/unipi_misc.c b/modules/neuron_spi/src/unipi_misc.c index 26a96e9..6efb89c 100644 --- a/modules/neuron_spi/src/unipi_misc.c +++ b/modules/neuron_spi/src/unipi_misc.c @@ -1,13 +1,28 @@ /* - * unipi_misc.c + * UniPi Neuron tty serial driver - Copyright (C) 2018 UniPi Technologies + * Author: Tomas Knot + * + * Based on the SC16IS7xx driver by Jon Ringle , + * which was in turn based on max310x.c, by Alexander Shiyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * Created on: 26 Feb 2018 - * Author: Tom Knot */ +/************ + * Includes * + ************/ + #include "unipi_misc.h" #include "unipi_spi.h" +/************************ + * Non-static Functions * + ************************/ + void neuronspi_led_proc(struct kthread_work *ws) { struct neuronspi_led_driver *led = to_led_driver(ws, led_work); diff --git a/modules/neuron_spi/src/unipi_misc.h b/modules/neuron_spi/src/unipi_misc.h index 9551b4f..ebeb7e2 100644 --- a/modules/neuron_spi/src/unipi_misc.h +++ b/modules/neuron_spi/src/unipi_misc.h @@ -1,13 +1,24 @@ /* - * unipi_misc.h + * UniPi Neuron tty serial driver - Copyright (C) 2018 UniPi Technologies + * Author: Tomas Knot + * + * Based on the SC16IS7xx driver by Jon Ringle , + * which was in turn based on max310x.c, by Alexander Shiyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * Created on: 26 Feb 2018 - * Author: Tom Knot */ #ifndef MODULES_NEURON_SPI_SRC_UNIPI_MISC_H_ #define MODULES_NEURON_SPI_SRC_UNIPI_MISC_H_ +/************ + * Includes * + ************/ + #include #include #include @@ -34,6 +45,9 @@ #include "unipi_common.h" +/************************* + * Function Declarations * + *************************/ void neuronspi_led_proc(struct kthread_work *ws); void neuronspi_led_set_brightness(struct led_classdev *ldev, enum led_brightness brightness); diff --git a/modules/neuron_spi/src/unipi_platform.c b/modules/neuron_spi/src/unipi_platform.c index cda7fc7..08a0ec8 100644 --- a/modules/neuron_spi/src/unipi_platform.c +++ b/modules/neuron_spi/src/unipi_platform.c @@ -1,19 +1,27 @@ /* - * unipi_platform.c + * UniPi Neuron tty serial driver - Copyright (C) 2018 UniPi Technologies + * Author: Tomas Knot + * + * Based on the SC16IS7xx driver by Jon Ringle , + * which was in turn based on max310x.c, by Alexander Shiyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * Created on: 23 Feb 2018 - * Author: Tom Knot */ +/************ + * Includes * + ************/ #include "unipi_platform.h" #include "unipi_spi.h" #include "unipi_common.h" -struct platform_device *neuron_plc_dev; - -/********************* - * Board Definitions * - *********************/ +/*************************** + * Static Data Definitions * + ***************************/ // B_1000 (S103) #define NEURONSPI_BOARD_B1000_HW_DEFINITION_BLOCK_SIZE 57 @@ -1333,9 +1341,11 @@ static u32 NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_DEFINITION_BLOCK[NEURONSPI_BOARD_E4 } struct neuronspi_board_combination NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_COMBINATION[] = {NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_DEFINITION}; -/********************* - * Model Definitions * - *********************/ +/******************** + * Data Definitions * + ********************/ + +struct platform_device *neuron_plc_dev; struct neuronspi_board_combination NEURONSPI_MODEL_S103_HW_DEFINITION_BOARD[NEURONSPI_MODEL_S103_HW_DEFINITION_BOARD_SIZE] = { NEURONSPI_BOARD_B1000_HW_DEFINITION @@ -1468,6 +1478,10 @@ struct neuronspi_model_definition NEURONSPI_MODELTABLE[NEURONSPI_MODELTABLE_LEN] .combination_count = 3, .combinations = NEURONSPI_MODEL_L513_HW_DEFINITION_BOARD} }; +/************************ + * Non-static Functions * + ************************/ + s32 neuronspi_regmap_invalidate(void *data) { int i; @@ -1559,7 +1573,8 @@ void neuronspi_regmap_invalidate_device(struct regmap *reg_map, struct neuronspi } } -int neuronspi_regmap_hw_reg_read(void *context, unsigned int reg, unsigned int *val) { +int neuronspi_regmap_hw_reg_read(void *context, unsigned int reg, unsigned int *val) +{ struct spi_device *spi = context; struct neuronspi_driver_data *n_spi = spi_get_drvdata(spi); u8 *inp_buf; @@ -1574,12 +1589,14 @@ int neuronspi_regmap_hw_reg_read(void *context, unsigned int reg, unsigned int * return 0; } -int neuronspi_regmap_hw_write(void *context, const void *data, size_t count) { +int neuronspi_regmap_hw_write(void *context, const void *data, size_t count) +{ BUG_ON(count < 1); return neuronspi_regmap_hw_gather_write(context, data, 1, data + 1, count - 1); } -int neuronspi_regmap_hw_reg_write(void *context, unsigned int reg, unsigned int val) { +int neuronspi_regmap_hw_reg_write(void *context, unsigned int reg, unsigned int val) +{ struct spi_device *spi = context; struct neuronspi_driver_data *n_spi = spi_get_drvdata(spi); u8 *inp_buf; @@ -1594,7 +1611,8 @@ int neuronspi_regmap_hw_reg_write(void *context, unsigned int reg, unsigned int return 0; } -int neuronspi_regmap_hw_gather_write(void *context, const void *reg, size_t reg_size, const void *val, size_t val_size) { +int neuronspi_regmap_hw_gather_write(void *context, const void *reg, size_t reg_size, const void *val, size_t val_size) +{ u16 *mb_reg_buf = (u16*)reg; u32 *mb_val_buf = (u32*)val; struct spi_device *spi = context; diff --git a/modules/neuron_spi/src/unipi_platform.h b/modules/neuron_spi/src/unipi_platform.h index 4166a27..8178ebb 100644 --- a/modules/neuron_spi/src/unipi_platform.h +++ b/modules/neuron_spi/src/unipi_platform.h @@ -1,13 +1,24 @@ /* - * unipi_platform.h + * UniPi Neuron tty serial driver - Copyright (C) 2018 UniPi Technologies + * Author: Tomas Knot + * + * Based on the SC16IS7xx driver by Jon Ringle , + * which was in turn based on max310x.c, by Alexander Shiyan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * Created on: 23 Feb 2018 - * Author: Tom Knot */ #ifndef MODULES_NEURON_SPI_SRC_UNIPI_PLATFORM_H_ #define MODULES_NEURON_SPI_SRC_UNIPI_PLATFORM_H_ +/************ + * Includes * + ************/ + #include #include #include @@ -34,9 +45,9 @@ #include "unipi_common.h" -/******************************** - * HW Constants Data Structures * - ********************************/ +/******************* + * Data Structures * + *******************/ struct neuronspi_board_entry { u16 index; @@ -148,11 +159,11 @@ struct neuronspi_model_definition struct neuronspi_board_combination *combinations; }; +/*************** + * Definitions * + ***************/ -/****************** - * HW Definitions * - ******************/ -// Lower Boards: +// Lower Boards #define NEURONSPI_BOARD_LOWER_B1000_ID 0 #define NEURONSPI_BOARD_LOWER_E8DI8RO_ID 1 #define NEURONSPI_BOARD_LOWER_E14RO_ID 2 @@ -161,8 +172,7 @@ struct neuronspi_model_definition #define NEURONSPI_BOARD_LOWER_B485_ID 13 #define NEURONSPI_BOARD_LOWER_E4LIGHT_ID 14 - -// Upper Boards: +// Upper Boards #define NEURONSPI_BOARD_UPPER_NONE_ID 0 #define NEURONSPI_BOARD_UPPER_P11DIR485_ID 1 #define NEURONSPI_BOARD_UPPER_U14RO_ID 2 @@ -170,7 +180,8 @@ struct neuronspi_model_definition #define NEURONSPI_BOARD_UPPER_P6DI5RO_ID 4 #define NEURONSPI_BOARD_UPPER_U6DI5RO_ID 5 -// Register function codes: +// Register function codes +// Digital Input Functions #define NEURONSPI_FUNGROUP_DI 0 #define NEURONSPI_REGFUN_DI_READ 0 | NEURONSPI_FUNGROUP_DI << 8 #define NEURONSPI_REGFUN_DI_COUNTER_LOWER 1 | NEURONSPI_FUNGROUP_DI << 8 @@ -180,9 +191,11 @@ struct neuronspi_model_definition #define NEURONSPI_REGFUN_DS_POLARITY 5 | NEURONSPI_FUNGROUP_DI << 8 #define NEURONSPI_REGFUN_DS_TOGGLE 6 | NEURONSPI_FUNGROUP_DI << 8 +// Digital Output Functions #define NEURONSPI_FUNGROUP_DO 1 #define NEURONSPI_REGFUN_DO_RW 0 | NEURONSPI_FUNGROUP_DO << 8 +// B1000 Analog Output Functions #define NEURONSPI_FUNGROUP_AO_BRAIN 2 #define NEURONSPI_REGFUN_AO_BRAIN 0 | NEURONSPI_FUNGROUP_AO_BRAIN << 8 #define NEURONSPI_REGFUN_AO_BRAIN_MODE 1 | NEURONSPI_FUNGROUP_AO_BRAIN << 8 @@ -191,6 +204,7 @@ struct neuronspi_model_definition #define NEURONSPI_REGFUN_AO_BRAIN_I_ERR 4 | NEURONSPI_FUNGROUP_AO_BRAIN << 8 #define NEURONSPI_REGFUN_AO_BRAIN_I_OFF 5 | NEURONSPI_FUNGROUP_AO_BRAIN << 8 +// B1000 Analog Input Functions #define NEURONSPI_FUNGROUP_AI_BRAIN 3 #define NEURONSPI_REGFUN_AI_BRAIN 0 | NEURONSPI_FUNGROUP_AI_BRAIN << 8 #define NEURONSPI_REGFUN_AIO_BRAIN 1 | NEURONSPI_FUNGROUP_AI_BRAIN << 8 @@ -202,6 +216,7 @@ struct neuronspi_model_definition #define NEURONSPI_REGFUN_AIO_BRAIN_ERR 7 | NEURONSPI_FUNGROUP_AI_BRAIN << 8 #define NEURONSPI_REGFUN_AIO_BRAIN_OFF 8 | NEURONSPI_FUNGROUP_AI_BRAIN << 8 +// System Functions #define NEURONSPI_FUNGROUP_SYSTEM 4 #define NEURONSPI_REGFUN_V_REF_INT 0 | NEURONSPI_FUNGROUP_SYSTEM << 8 #define NEURONSPI_REGFUN_V_REF_INP 1 | NEURONSPI_FUNGROUP_SYSTEM << 8 @@ -216,30 +231,34 @@ struct neuronspi_model_definition #define NEURONSPI_REGFUN_INTERRUPTS 10 | NEURONSPI_FUNGROUP_SYSTEM << 8 #define NEURONSPI_REGFUN_NONE_TEST 11 | NEURONSPI_FUNGROUP_SYSTEM << 8 +// Watchdog Functions #define NEURONSPI_FUNGROUP_MWD 5 #define NEURONSPI_REGFUN_MWD_TO 0 | NEURONSPI_FUNGROUP_MWD << 8 #define NEURONSPI_REGFUN_MWD_STATUS 1 | NEURONSPI_FUNGROUP_MWD << 8 +// PWM Functions #define NEURONSPI_FUNGROUP_PWM 6 #define NEURONSPI_REGFUN_PWM_DUTY 0 | NEURONSPI_FUNGROUP_PWM << 8 #define NEURONSPI_REGFUN_PWM_PRESCALE 1 | NEURONSPI_FUNGROUP_PWM << 8 #define NEURONSPI_REGFUN_PWM_CYCLE 2 | NEURONSPI_FUNGROUP_PWM << 8 - +// UART Functions #define NEURONSPI_FUNGROUP_RS485 7 #define NEURONSPI_REGFUN_TX_QUEUE_LEN 0 | NEURONSPI_FUNGROUP_RS485 << 8 #define NEURONSPI_REGFUN_RS485_CONFIG 1 | NEURONSPI_FUNGROUP_RS485 << 8 #define NEURONSPI_REGFUN_RS485_ADDRESS 2 | NEURONSPI_FUNGROUP_RS485 << 8 +// Secondary Analog Output Functions #define NEURONSPI_FUNGROUP_AO_VER2 8 #define NEURONSPI_REGFUN_AO_VER2_RW 0 | NEURONSPI_FUNGROUP_AO_VER2 << 8 +// Secondary Analog Input Functions #define NEURONSPI_FUNGROUP_AI_VER2 9 #define NEURONSPI_REGFUN_AI_VER2_READ_LOWER 0 | NEURONSPI_FUNGROUP_AI_VER2 << 8 #define NEURONSPI_REGFUN_AI_VER2_READ_UPPER 0 | NEURONSPI_FUNGROUP_AI_VER2 << 8 #define NEURONSPI_REGFUN_AI_VER2_MODE 1 | NEURONSPI_FUNGROUP_AI_VER2 << 8 -// Register access flags: +// Register access flags #define NEURONSPI_REGFLAG_ACC_NEVER 0 #define NEURONSPI_REGFLAG_ACC_AFAP 0x1 << 16 #define NEURONSPI_REGFLAG_ACC_10HZ 0x2 << 16 @@ -249,54 +268,39 @@ struct neuronspi_model_definition #define NEURONSPI_REGFLAG_ACC_15MIN 0x6 << 16 #define NEURONSPI_REGFLAG_ACC_ONCE 0x7 << 16 -// Register system flags: +// Register system flags #define NEURONSPI_REGFLAG_SYS_READ_ONLY 0x10 << 24 +// IIO Modes #define NEURONSPI_IIO_AI_STM_MODE_VOLTAGE 0x0 #define NEURONSPI_IIO_AI_STM_MODE_CURRENT 0x1 #define NEURONSPI_IIO_AI_STM_MODE_RESISTANCE 0x3 /********************* - * Board Definitions * + * Data Declarations * *********************/ -// B_1000 (S103) -extern struct neuronspi_board_combination NEURONSPI_BOARD_B1000_HW_COMBINATION[]; -// E-8Di8Ro (M103) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E8DI8RO_HW_COMBINATION[]; -// E-14Ro -extern struct neuronspi_board_combination NEURONSPI_BOARD_E14RO_HW_COMBINATION[]; -// E-16Di -extern struct neuronspi_board_combination NEURONSPI_BOARD_E16DI_HW_COMBINATION[]; -// E-8Di8Ro_P-11DiR485 (xS10) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E8DI8ROP11DIR485_HW_COMBINATION[]; -// E-14Ro_P-11DiR485 (xS40) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E14ROP11DIR485_HW_COMBINATION[]; -// E-16Di_P-11DiR485 (xS30) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E16DIP11DIR485_HW_COMBINATION[]; -// E-14Ro_U-14Ro (M403) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E14ROU14RO_HW_COMBINATION[]; -// E-16Di_U-14Ro (M203) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E16DIU14RO_HW_COMBINATION[]; -// E-14Ro_U-14Di (L503) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E14ROU14DI_HW_COMBINATION[]; -// E-16Di_U-14Di (M303) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E16DIU14DI_HW_COMBINATION[]; -// E-4Ai4Ao -extern struct neuronspi_board_combination NEURONSPI_BOARD_E4AI4AO_HW_COMBINATION[]; -// E-4Ai4Ao_P-6Di5Ro (xS50) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E4AI4AOP6DI5RO_HW_COMBINATION[]; -// B-485 -extern struct neuronspi_board_combination NEURONSPI_BOARD_B485_HW_COMBINATION[]; -// E-4Light (M613) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E4LIGHT_HW_COMBINATION[]; -// E-4Ai4Ao_U-6Di5Ro (L503) -extern struct neuronspi_board_combination NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_COMBINATION[]; - -/********************* - * Model Definitions * - *********************/ +extern struct platform_device *neuron_plc_dev; +// Board Definitions +extern struct neuronspi_board_combination NEURONSPI_BOARD_B1000_HW_COMBINATION[]; // B_1000 (S103) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E8DI8RO_HW_COMBINATION[]; // E-8Di8Ro (M103) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E14RO_HW_COMBINATION[]; // E-14Ro +extern struct neuronspi_board_combination NEURONSPI_BOARD_E16DI_HW_COMBINATION[]; // E-16Di +extern struct neuronspi_board_combination NEURONSPI_BOARD_E8DI8ROP11DIR485_HW_COMBINATION[]; // E-8Di8Ro_P-11DiR485 (xS10) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E14ROP11DIR485_HW_COMBINATION[]; // E-14Ro_P-11DiR485 (xS40) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E16DIP11DIR485_HW_COMBINATION[]; // E-16Di_P-11DiR485 (xS30) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E14ROU14RO_HW_COMBINATION[]; // E-14Ro_U-14Ro (M403) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E16DIU14RO_HW_COMBINATION[]; // E-16Di_U-14Ro (M203) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E14ROU14DI_HW_COMBINATION[]; // E-14Ro_U-14Di (L503) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E16DIU14DI_HW_COMBINATION[]; // E-16Di_U-14Di (M303) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E4AI4AO_HW_COMBINATION[]; // E-4Ai4Ao +extern struct neuronspi_board_combination NEURONSPI_BOARD_E4AI4AOP6DI5RO_HW_COMBINATION[]; // E-4Ai4Ao_P-6Di5Ro (xS50) +extern struct neuronspi_board_combination NEURONSPI_BOARD_B485_HW_COMBINATION[]; // B-485 +extern struct neuronspi_board_combination NEURONSPI_BOARD_E4LIGHT_HW_COMBINATION[]; // E-4Light (M613) +extern struct neuronspi_board_combination NEURONSPI_BOARD_E4AI4AOU6DI5RO_HW_COMBINATION[]; // E-4Ai4Ao_U-6Di5Ro (L503) + +// Model Definitions #define NEURONSPI_MODEL_S103_HW_DEFINITION_BOARD_SIZE 1 extern struct neuronspi_board_combination NEURONSPI_MODEL_S103_HW_DEFINITION_BOARD[NEURONSPI_MODEL_S103_HW_DEFINITION_BOARD_SIZE]; #define NEURONSPI_MODEL_S103G_HW_DEFINITION_BOARD_SIZE 1 @@ -329,7 +333,6 @@ extern struct neuronspi_board_combination NEURONSPI_MODEL_L503_HW_DEFINITION_BOA extern struct neuronspi_board_combination NEURONSPI_MODEL_L513_HW_DEFINITION_BOARD[]; // Board table -// Column 4 is the number of 0-indexed registers and column 5 is the number of 1000-indexed ones #define NEURONSPI_BOARDTABLE_LEN 16 extern struct neuronspi_board_entry NEURONSPI_BOARDTABLE[]; @@ -337,14 +340,15 @@ extern struct neuronspi_board_entry NEURONSPI_BOARDTABLE[]; #define NEURONSPI_MODELTABLE_LEN 15 extern struct neuronspi_model_definition NEURONSPI_MODELTABLE[]; -extern struct platform_device *neuron_plc_dev; +/************************* + * Function Declarations * + *************************/ int neuronspi_regmap_hw_gather_write(void *context, const void *reg, size_t reg_size, const void *val, size_t val_size); int neuronspi_regmap_hw_read(void *context, const void *reg_buf, size_t reg_size, void *val_buf, size_t val_size); int neuronspi_regmap_hw_reg_read(void *context, unsigned int reg, unsigned int *val); int neuronspi_regmap_hw_reg_write(void *context, unsigned int reg, unsigned int val); int neuronspi_regmap_hw_write(void *context, const void *data, size_t count); - void neuronspi_regmap_invalidate_device(struct regmap *reg_map, struct neuronspi_board_combination *device_def, u32 period_counter); s32 neuronspi_regmap_invalidate(void *data); int neuronspi_create_reg_starts(struct neuronspi_board_regstart_table *out_table, struct neuronspi_board_combination *board); diff --git a/modules/neuron_spi/src/unipi_spi.c b/modules/neuron_spi/src/unipi_spi.c index ae6401f..ef7b033 100644 --- a/modules/neuron_spi/src/unipi_spi.c +++ b/modules/neuron_spi/src/unipi_spi.c @@ -15,6 +15,10 @@ nologies #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +/************ + * Includes * + ************/ + #include "unipi_common.h" #include "unipi_sysfs.h" #include "unipi_uart.h" @@ -24,6 +28,10 @@ nologies #include "unipi_misc.h" #include "unipi_spi.h" +/******************** + * Data Definitions * + ********************/ + MODULE_DEVICE_TABLE(of, neuronspi_id_match); struct spi_driver neuronspi_spi_driver = @@ -60,9 +68,9 @@ spinlock_t neuronspi_probe_spinlock; struct spi_device* neuronspi_s_dev[NEURONSPI_MAX_DEVS]; struct task_struct *neuronspi_invalidate_thread; -/*********************** - * End of Data section * - ***********************/ +/************************ + * Non-static Functions * + ************************/ int neuronspi_open (struct inode *inode_p, struct file *file_p) { @@ -421,7 +429,6 @@ u8 neuronspi_spi_uart_get_ldisc(struct spi_device* spi_dev, u8 port) if (d_data->slower_model) { frequency = NEURONSPI_SLOWER_FREQ; } - neuronspi_spi_compose_single_register_read(503, &message_buf, &recv_buf); if (!d_data->reserved_device) { neuronspi_spi_send_message(spi_dev, message_buf, recv_buf, NEURONSPI_SPI_UART_SET_CFLAG_MESSAGE_LEN, frequency, 35, 1); @@ -449,7 +456,6 @@ void neuronspi_spi_iio_sec_ai_read_voltage(struct iio_dev *indio_dev, struct iio u32 sec_ai_val_h = 0; u32 sec_ai_val_m = 0; u8 sec_ai_exp = 0; - regmap_read(n_spi->reg_map, n_spi->regstart_table->sec_ai_val_reg + (2 * ai_data->index), &sec_ai_val_h); regmap_read(n_spi->reg_map, n_spi->regstart_table->sec_ai_val_reg + 1 + (2 * ai_data->index), &sec_ai_val_l); sec_ai_val_m = ((((u32)sec_ai_val_h) << 25) | (((u32)sec_ai_val_l) << 9)) >> 16; @@ -604,15 +610,12 @@ void neuronspi_spi_iio_stm_ao_set_voltage(struct iio_dev *indio_dev, struct iio_ u32 stm_v_inp_ref = 0; u32 stm_v_err = 0; u32 stm_v_off = 0; - u64 stm_true_val = val; u64 stm_true_ref = 0; - regmap_read(n_spi->reg_map, n_spi->regstart_table->vref_int, &stm_v_int_ref); regmap_read(n_spi->reg_map, n_spi->regstart_table->vref_inp, &stm_v_inp_ref); regmap_read(n_spi->reg_map, n_spi->regstart_table->stm_ao_vol_err, &stm_v_err); regmap_read(n_spi->reg_map, n_spi->regstart_table->stm_ao_vol_off, &stm_v_off); - stm_true_ref = ((u64)stm_v_int_ref) * (99000 + stm_v_err) * 1000; stm_v_inp_ref = stm_v_inp_ref * 10000; stm_true_val = ((stm_true_val * 10000) - stm_v_off) * 4095; @@ -620,9 +623,7 @@ void neuronspi_spi_iio_stm_ao_set_voltage(struct iio_dev *indio_dev, struct iio_ stm_v_inp_ref = stm_true_ref; do_div(stm_true_val, stm_v_inp_ref); do_div(stm_true_val, 10000); - if (stm_true_val > 4095) stm_true_val = 4095; - regmap_write(n_spi->reg_map, n_spi->regstart_table->stm_ao_val_reg, (unsigned int) stm_true_val); } @@ -1559,7 +1560,7 @@ static s32 __init neuronspi_init(void) } return ret; } -module_init(neuronspi_init); +__attribute__((unused)) module_init(neuronspi_init); static void __exit neuronspi_exit(void) { @@ -1583,7 +1584,7 @@ static void __exit neuronspi_exit(void) kfree(neuronspi_spi_w_spinlock); printk(KERN_INFO "NEURONSPI: SPI Driver Unregistered\n"); } -module_exit(neuronspi_exit); +__attribute__((unused)) module_exit(neuronspi_exit); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Tomas Knot "); diff --git a/modules/neuron_spi/src/unipi_spi.h b/modules/neuron_spi/src/unipi_spi.h index b38f97d..75e795f 100644 --- a/modules/neuron_spi/src/unipi_spi.h +++ b/modules/neuron_spi/src/unipi_spi.h @@ -15,10 +15,9 @@ #ifndef MODULES_NEURON_SPI_SRC_UNIPI_SPI_H_ #define MODULES_NEURON_SPI_SRC_UNIPI_SPI_H_ - -#define NEURONSPI_SCHED_REQUIRED 0 // Older kernels do not require sched/types to be specifically imported - -#define NEURONSPI_MAJOR_VERSIONSTRING "Development Beta Version 0.02:12:02:2018" +/************ + * Includes * + ************/ #include #include @@ -49,6 +48,10 @@ #include "unipi_sysfs.h" #include "unipi_iio.h" +/******************** + * Module Constants * + ********************/ + #define NEURONSPI_SLOWER_MODELS_LEN 3 static const u16 NEURONSPI_SLOWER_MODELS[NEURONSPI_SLOWER_MODELS_LEN] = { 0xb10, 0xc10, 0xf10 @@ -146,18 +149,15 @@ static const u16 NEURONSPI_CRC16TABLE[NEURONSPI_CRC16TABLE_LEN] = { 3458, 1922, 514 }; - - -/******************** - * Module Constants * - ********************/ - static const struct of_device_id neuronspi_id_match[] = { {.compatible = "unipi,neuron"}, {.compatible = NEURON_DEVICE_NAME}, {} }; +/*************** + * Definitions * + ***************/ #define NEURON_INT_RX_NOT_EMPTY 0x1 #define NEURON_INT_TX_FINISHED 0x2 @@ -179,15 +179,9 @@ static const struct of_device_id neuronspi_id_match[] = { #define MODBUS_MAX_WR_WRITE_REGISTERS 121 #define MODBUS_MAX_WR_READ_REGISTERS 125 -/******************* - * Data structures * - *******************/ - - - -/************* - * Functions * - *************/ +/************************* + * Function Declarations * + *************************/ int neuronspi_open (struct inode *, struct file *); int neuronspi_release (struct inode *, struct file *); @@ -215,7 +209,6 @@ void neuronspi_spi_iio_sec_ao_set_voltage(struct iio_dev *indio_dev, struct iio_ int neuronspi_spi_gpio_do_set(struct spi_device* spi_dev, u32 id, int value); int neuronspi_spi_gpio_ro_set(struct spi_device* spi_dev, u32 id, int value); int neuronspi_spi_gpio_di_get(struct spi_device* spi_dev, u32 id); - int neuronspi_spi_gpio_di_get(struct spi_device* spi_dev, u32 id); /*********************** @@ -360,9 +353,9 @@ static const struct iio_info neuronspi_sec_ao_info = { #define to_uart_port(p,e) ((container_of((p), struct uart_port, e))) -/*********************** - * Inline Functions * - ***********************/ +/********************* + * In-line Functions * + *********************/ static __always_inline u16 neuronspi_spi_crc(u8* inputstring, s32 length, u16 initval) { diff --git a/modules/neuron_spi/src/unipi_sysfs.c b/modules/neuron_spi/src/unipi_sysfs.c index 9449b3f..e82f957 100644 --- a/modules/neuron_spi/src/unipi_sysfs.c +++ b/modules/neuron_spi/src/unipi_sysfs.c @@ -12,8 +12,15 @@ * */ +/************ + * Includes * + ************/ + #include "unipi_sysfs.h" +/************************ + * Static Functions * + ************************/ static ssize_t neuronspi_show_model(struct device *dev, struct device_attribute *attr, char *buf) { @@ -912,6 +919,9 @@ err_end: return count; } +/********************************** + * Function Structure Definitions * + **********************************/ static DEVICE_ATTR(model_name, 0440, neuronspi_show_model, NULL); static DEVICE_ATTR(sys_eeprom_name, 0440, neuronspi_show_eeprom, NULL); diff --git a/modules/neuron_spi/src/unipi_sysfs.h b/modules/neuron_spi/src/unipi_sysfs.h index 4094912..72ae365 100644 --- a/modules/neuron_spi/src/unipi_sysfs.h +++ b/modules/neuron_spi/src/unipi_sysfs.h @@ -15,6 +15,10 @@ #ifndef MODULES_NEURON_SPI_SRC_UNIPI_SYSFS_H_ #define MODULES_NEURON_SPI_SRC_UNIPI_SYSFS_H_ +/************ + * Includes * + ************/ + #include #include #include diff --git a/modules/neuron_spi/src/unipi_uart.c b/modules/neuron_spi/src/unipi_uart.c index 32e8407..92d8b17 100644 --- a/modules/neuron_spi/src/unipi_uart.c +++ b/modules/neuron_spi/src/unipi_uart.c @@ -12,14 +12,25 @@ * */ +/************ + * Includes * + ************/ #include "unipi_uart.h" #include "unipi_spi.h" +/******************** + * Data Definitions * + ********************/ + struct neuronspi_uart_data* neuronspi_uart_glob_data; unsigned long neuronspi_lines; struct uart_driver* neuronspi_uart; +/************************ + * Non-static Functions * + ************************/ + void neuronspi_uart_tx_proc(struct kthread_work *ws) { struct neuronspi_port *port = to_neuronspi_port(ws, tx_work); @@ -42,20 +53,12 @@ u32 neuronspi_uart_tx_empty(struct uart_port *port) u32 neuronspi_uart_get_mctrl(struct uart_port *port) { - /* DCD and DSR are not wired and CTS/RTS is handled automatically - * so just indicate DSR and CAR asserted - */ #if NEURONSPI_DETAILED_DEBUG > 0 printk(KERN_DEBUG "NEURONSPI: UART MCTRL Get\n"); #endif return TIOCM_DSR | TIOCM_CAR; } -void neuronspi_uart_set_mctrl(struct uart_port *port, u32 mctrl) -{ - /* Do Nothing */ -} - int neuronspi_uart_ioctl (struct uart_port *port, unsigned int ioctl_code, unsigned long ioctl_arg) { switch (ioctl_code) { @@ -93,11 +96,6 @@ void neuronspi_uart_set_ldisc(struct uart_port *port, struct ktermios *kterm) return; } -void neuronspi_uart_break_ctl(struct uart_port *port, int break_state) -{ - -} - void neuronspi_uart_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old) { s32 baud; @@ -123,7 +121,6 @@ void neuronspi_uart_set_termios(struct uart_port *port, struct ktermios *termios neuronspi_uart_set_ldisc(port, termios); } } - baud = uart_get_baud_rate(port, termios, old, 2400, 115200); uart_update_timeout(port, termios->c_cflag, baud); } @@ -134,30 +131,7 @@ s32 neuronspi_uart_config_rs485(struct uart_port *port, struct serial_rs485 *rs4 return 0; } -// Initialise the module -s32 neuronspi_uart_startup(struct uart_port *port) -{ - struct neuronspi_port *n_port = to_neuronspi_port(port, port); - struct spi_device *spi = neuronspi_s_dev[n_port->dev_index]; - struct neuronspi_driver_data *d_data = spi_get_drvdata(spi); - neuronspi_spi_set_irqs(spi, 0x5); - if (d_data->poll_thread != NULL) { - wake_up_process(d_data->poll_thread); - } else if (d_data->no_irq) { - d_data->poll_thread = kthread_create(neuronspi_uart_poll, (void *)d_data, "UART_poll_thread"); - } - neuronspi_uart_power(port, 1); - // TODO: /* Reset FIFOs*/ -#if NEURONSPI_DETAILED_DEBUG > 0 - printk(KERN_DEBUG "NEURONSPI: UART Startup\n"); -#endif - return 0; -} -void neuronspi_uart_shutdown(struct uart_port *port) -{ - neuronspi_uart_power(port, 0); -} const char* neuronspi_uart_type(struct uart_port *port) { @@ -208,10 +182,6 @@ s32 neuronspi_uart_alloc_line(void) return i; } -void neuronspi_uart_power(struct uart_port *port, s32 on) -{ - /* Do nothing */ -} void neuronspi_uart_handle_rx(struct neuronspi_port *port, u32 rxlen, u32 iir) { @@ -327,11 +297,6 @@ void neuronspi_uart_pm(struct uart_port *port, u32 state, u32 oldstate) neuronspi_uart_power(port, (state == UART_PM_STATE_ON) ? 1 : 0); } -void neuronspi_uart_null_void(struct uart_port *port) -{ - /* Do nothing */ -} - s32 neuronspi_uart_probe(struct spi_device* dev, u8 device_index) { struct neuronspi_driver_data* driver_data = spi_get_drvdata(dev); @@ -494,17 +459,6 @@ void neuronspi_uart_rx_proc(struct kthread_work *ws) kfree(send_buf); } - -void neuronspi_uart_stop_tx(struct uart_port *port) -{ - // ToDo : create new opcode / coil? -} - -void neuronspi_uart_stop_rx(struct uart_port *port) -{ - // ToDo : create new opcode / coil? -} - void neuronspi_uart_start_tx(struct uart_port *port) { struct neuronspi_port *n_port = to_neuronspi_port(port,port); @@ -532,3 +486,58 @@ s32 neuronspi_uart_poll(void *data) } return 0; } + +// Initialise the driver +s32 neuronspi_uart_startup(struct uart_port *port) +{ + struct neuronspi_port *n_port = to_neuronspi_port(port, port); + struct spi_device *spi = neuronspi_s_dev[n_port->dev_index]; + struct neuronspi_driver_data *d_data = spi_get_drvdata(spi); + neuronspi_spi_set_irqs(spi, 0x5); + if (d_data->poll_thread != NULL) { + wake_up_process(d_data->poll_thread); + } else if (d_data->no_irq) { + d_data->poll_thread = kthread_create(neuronspi_uart_poll, (void *)d_data, "UART_poll_thread"); + } + neuronspi_uart_power(port, 1); + // TODO: /* Reset FIFOs*/ +#if NEURONSPI_DETAILED_DEBUG > 0 + printk(KERN_DEBUG "NEURONSPI: UART Startup\n"); +#endif + return 0; +} + +void neuronspi_uart_shutdown(struct uart_port *port) +{ + neuronspi_uart_power(port, 0); +} + +/******************* + * Empty functions * + *******************/ + +void neuronspi_uart_stop_tx(struct uart_port *port) +{ + /* Do Nothing */ +} + +void neuronspi_uart_stop_rx(struct uart_port *port) +{ + /* Do Nothing */ +} +void neuronspi_uart_set_mctrl(struct uart_port *port, u32 mctrl) +{ + /* Do Nothing */ +} +void neuronspi_uart_break_ctl(struct uart_port *port, int break_state) +{ + /* Do Nothing */ +} +void neuronspi_uart_power(struct uart_port *port, s32 on) +{ + /* Do nothing */ +} +void neuronspi_uart_null_void(struct uart_port *port) +{ + /* Do nothing */ +} diff --git a/modules/neuron_spi/src/unipi_uart.h b/modules/neuron_spi/src/unipi_uart.h index cb0ec4c..f8bfb25 100644 --- a/modules/neuron_spi/src/unipi_uart.h +++ b/modules/neuron_spi/src/unipi_uart.h @@ -15,6 +15,10 @@ #ifndef MODULES_NEURON_SPI_SRC_UNIPI_UART_H_ #define MODULES_NEURON_SPI_SRC_UNIPI_UART_H_ +/************ + * Includes * + ************/ + #include #include #include @@ -43,9 +47,10 @@ #include "unipi_platform.h" -extern struct neuronspi_uart_data* neuronspi_uart_glob_data; -extern unsigned long neuronspi_lines; -extern struct uart_driver* neuronspi_uart; + +/************************* + * Function Declarations * + *************************/ void neuronspi_uart_start_tx(struct uart_port *port); void neuronspi_uart_stop_tx(struct uart_port *port); @@ -82,6 +87,14 @@ void neuronspi_uart_handle_tx(struct neuronspi_port *port); void neuronspi_uart_handle_rx(struct neuronspi_port *port, u32 rxlen, u32 iir); void neuronspi_uart_handle_irq(struct neuronspi_uart_data *uart_data, u32 portno); +/********************* + * Data Declarations * + *********************/ + +extern struct neuronspi_uart_data* neuronspi_uart_glob_data; +extern unsigned long neuronspi_lines; +extern struct uart_driver* neuronspi_uart; + static const struct uart_ops neuronspi_uart_ops = { .tx_empty = neuronspi_uart_tx_empty, -- 2.34.1